peterbjornx's website Peterbjornx (Peter Bosch)'s website Wed, 29 Apr 2015 22:25:24 +0000 en-US hourly 1 Arduino bootstrapped 68008 computer Thu, 14 Aug 2014 03:21:19 +0000 peterbjornx After a fellow TkkrLab member donated some old chips (including some 68008 and Z80 CPUs) to the hackerspace I wanted to try to build a computer with the 68008 processor.

The 68008 processor is the 8-bit bus version of the 68000, which is the first 68k architecture processor. It is a 16-bit processor that was designed with forward compatibility in mind and to achieve that goal all of its internal registers (except for the status register) are 32-bits. The 68008 is interesting because it has a relatively low pin count and is therefore quite easy to use on a breadboard.


The computer at it is at the moment


I looked up the datasheet for the processor and noticed that it allowed a device on the bus to add wait states as long as needed to complete a transfer, this sparked the idea to use an Arduino as “boot ROM”. I came up with a system where the arduino would dynamically generate 32 byte chunks of 68k machine code to load data into the RAM, disable the arduino bus interface and reset the processor afterwards, booting the new code from RAM.

The idea was simple: Make the glue logic map the first 64K of address space to the Arduino until it signalled boot complete, When that happened it would map the RAM to the first 64K and reset, executing the code that was uploaded.

The implementation yielded some interesting problems: First, the Arduino turned out to be too slow at releasing ~DTACK which caused the processor to assume every read was immediately completed until the arduino released the line. I fixed this by adding a D flip-flop with the D input tied high, the reset input connected to NOT ~AS and the clock connected to the Arduno. The inverting output of the flip-flop is connected to ~DTACK so that the Arduino can assert ~DTACK by setting the clock input high, and once the cycle is complete the processor will release ~AS and the flipflop will clear, causing ~DTACK to be released until the Arduino pulses the clock input again.

When this was fixed the setup would still not work: Although setting the reset vectors appeared to work (I have the Arduino log the adresses requested from it) I could not get it to run a simple “loop: jmp loop”… After a lot of trial and error I discovered i had not connected D7 from the Arduino, as soon as I fixed this it worked: The logs indicated the processor repeatedly fetching address 8 through 11, indicating it was actually looping.

I could, however, not write data anywhere as the Arduino was still way too slow at releasing the bus so I had to add a bus transceiver between the Arduino and the bus to prevent the Arduino and 68008 driving it at the same time.

While doing this I realized that I could never write to the RAM while the bootstrap mode was enabled: Temporarily disabling that mode as I had intended to do would have caused the ~DTACK line to be asserted immediately by the RAM on any cycle after that so the Arduino would not have been able to (reliably) disable it again. To solve this I decided to map the third 64K block of address space to the RAM without routing it through the bootstrap logic so that I can write to the RAM while the Arduino is still mapped on the first 64K.

Now that I finally had the design flaws ironed out I decided to write a simple program for the LED attached to the digital output:

DL 0
DL 8
MOVE.B D1, $010000




When I tried to run this code the processor would lock up after fetching the MOVE.B D1, $01000 instruction. Turns out I did not make the digital output register assert ~DTACK, causing the processor to wait for it forever. This was a simple fix: I added an inverter between the write enable input of the register and the ~DTACK output, causing the digital output register accesses to always complete immediately. I had now arrived at the (hopefully) correct glue logic combination to make this thing work.

Having done so much simple testing I wanted to finally see something happen on the breadboard and wrote this simple blink program:

DL 0
DL 8


SUBQ #1, D0

MOVE.B D1, $010000

Against all expectations, this worked right away: The led started blinking nicely, al be it very slowly: The Arduino fetches take 1 millisecond per byte.

I have not yet tried writing to the RAM or disabling the Arduino but the most tricky part of the build works: The slow 8-bit micro acting as ROM.

I have uploaded the Arduino code to pastebin here and the schematics are available online here.

When I get back to the hackerspace I am going to test the RAM and add a 68901 multifunction peripheral to the mix.

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A review of the “fine European craftmanship” in a French-built oscilloscope Wed, 28 Aug 2013 09:44:12 +0000 peterbjornx A couple of weeks ago my neighbour gave me an old cold war-era analog dual channel oscilloscope, I already owned an expensive Tektronix scope so I decided to take it apart.
The first thing I noticed was that there were no optocouplers present on the E.H.T. * board and after closer inspection I found that the “Focus” and “Brilliance” controls were directly connected to the -2 kV rail and that the user was only protected from these potentially lethal voltages by the plastic knobs on those potentiometers. Obviously this is a very dangerous situation as loss of a knob could result in electrocution.
Another curious aspect of this oscilloscope’s design was the fact that the CRT was mounted tightly into a plastic clamp, possibly causing the tube to break if the oscilloscope was to be exposed to any kind of mechanical abuse, which poses a significant risk to the user as the tube might violently explode when broken.
Besides these safety issues I also noticed a peculiar choice of materials for the chassis and mechanical supports, for simple mounting brackets which did not need to support any weight they chose to use thick pressed steel whereas they used injection-molded plastic for the main structural supports.
When i finished examining the device and tried to reassemble it I ran into a couple of problems: First of all the colour coding was not unique and all of the markings on the connectors were in French, they also neglected to mark the signal and ground pins for the RF connections. Because of these issues I was not able to successfully reassemble the oscilloscope, which however unfortunate, did yield me a very cool, round, Telefunken CRT!
One thing I have learned from this is that something being European made does not inherently mean it is of good quality.

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[Library/Games] Java OpenGL based graphics engine Fri, 16 Aug 2013 16:42:33 +0000 peterbjornx Two years ago I wanted to replace the engine of an old game I reverse engineered with a more modern one, but writing the whole new engine into the game seemed like a waste to me so I wrote this graphics engine. It has API’s for low level OpenGL features and is based on LWJGL, but also includes very high level interfaces which allow you to construct an application without knowing anything about OpenGL or computer graphics.

It consists of several layers of abstraction, the lowest layer wraps basic GL operations such as managing and encoding buffers of geometric data and integrating their deallocation into the Java GC to prevent OpenGL server memory leaks.

The layer above that very lowest layer manages objects in a scene graph, in which every object (which can be rendering objects, cameras, effects etc.) is based on a Node superclass which provides methods for managing their position in the scene graph, this layer also contains two special kinds of Node implementations: Camera and GeometryNode.
Camera provides a customizable camera which by default uses perspective projection and allows for extra rendering configuration to be done using RenderControl instances, changing properties of the camera not exposed through setter methods is possible by overriding methods like updateProjectionMatrix().
GeometryNode is a base class for objects that render geometry or do other operations affected by the modelview matrix, it sets up the modelview matrix in such a way that any operations done within renderGeometry(Camera) will have their results positioned at that Node‘s position in the world.

The next level above that is mainly for simple programs that do not really need to utilise the power of the lower level API’s and simply need a way to show some nice looking 3D objects. It provides a base class for the application, SimpleApplication, which takes all the complicated things like initializing the engine and implementing a main loop which does all necessary calls to get the image rendering. The CameraControl framework is also part of this layer, it provides a simple way of adding ,for example, a first person camera to your application.


GitHub project

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[FPGA] RISC Processor Fri, 16 Aug 2013 14:01:42 +0000 peterbjornx I designed and implemented this processor for my HAVO (secondary school) final assignment, for which it scored 10 out of 10 points and about which the local university(Universiteit Twente) who helped my school assess it said it would have been usable as a thesis for CS master.

It has 32 general registers and a link register for function returns, it supports direct, indirect and indexed addressing modes and has almost all basic operations implemented as instructions.

I also wrote an assembler for it, which is included in the Google Code project linked to below.

Click here to skip to the links and downloads section



  • Addition
  • Subtraction
  • Multiplication
  • Compare (Subtraction which discards the result but sets the status bits)


  • And
  • Or
  • Exclusive or
  • Not and


  • Load general purpose register
  • Store general purpose register
  • Load special (Link, Control) register
  • Store special (Link, Control) register


All branch (branch, call or return) instructions are conditional (support the conditions listed below) and support both immediate mode and register based relative targets.


  • Branch
  • Call
  • Return


  • Less than
  • Equal
  • Greater than
  • Unconditional


Download most recent source code
GoogleCode project (outdated code)
The paper I wrote about it as part of the assignment (Dutch)
YouTube video of my presentation about the assignment (Dutch)

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[FPGA] VGA text mode controller Fri, 16 Aug 2013 13:49:11 +0000 peterbjornx After I got the RISC processor working I wanted it to do something more visual than writing to an memory mapped 7-segment LED display so I decided to write a VGA controller for it, obviously I didn’t want to have to write a graphics and font library for it so I decided to do a text mode VGA controller rather than a full graphics controller.

I decided to implement it in a very modular way and to start with the low level stuff so I first created a timebase component which would be instantiated twice, once for the horizontal scan and once for the vertical scan, these modules automatically generated both the control signals for blanking, sync generation and in the case of the horizontal instance, the triggering of the vertical timebase. They obviously also generate the current pixel horizontal and vertical position to be used for looking up the pixel value, the pixel value is determined by looking up the character code at the current position and then using a font table to determine whether that pixel should be the background or foreground colour.

The text RAM is write-only from the perspective of the processor, and is implemented through an alterasyncram megafunction, and has a separate clock input for the read and write ports, the read port is obviously clocked from the pixel clock and the write port clock is exposed as a port on the controller function.

The pixel clock is generated through a PLL from a 50MHz input clock and is set to a fixed rate. The VGA controller uses a pixel resolution of 640×400 resulting in a text resolution of 80×25 with its 8×16 font. It supports a 12-bit global background and foreground colour which are at the moment hard-wired but can easily be mapped to an memory address.


To build this project you either need to edit the project file and connect it to a different bus( although there is a preloaded message in the text RAM, so you could just tie the bus to 0) or download the processor project too and place both the directories in the same parent directory.

This project uses Altera specific megafunctions and must be significantly altered to run on other FPGA’s

This project was tested on an Altera DE-1 FPGA development board, you might need to edit it to work on a different board.


Download source code
The processor it was made for

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Welcome to my new website Tue, 13 Aug 2013 23:15:44 +0000 peterbjornx First of all, welcome to my new website!

I will use this site as a portal to the many different projects and services i have worked on or offer and to keep you posted about ideas i might have, don’t worry, i will not use this site to bother you with boring aspects of my life as some people do, there is a better place for that: Facebook ;-) . With this site i hope to create a single compact home for all of my past and present work, combining information and resources from all of the different sites and communities i have used in the past.


Now for the technicalities:

I have just moved the website to a new VPS at the local hackerspace (TkkrLab), which means I am now able to use more resource intensive software for it, such as WordPress!

The initial set up of the software is now complete but I am still very busy with the content so please ignore any non-functional areas of the site or other inconveniences as the site is not yet completed.

I also chose to include some adverts on the website, these are provided by Google AdSense at the moment, i do realize that a lot of people visiting this site oppose Google’s practices concerning privacy but it’s not free to run a website so i simply have to include these adverts. If anyone knows a good alternative to AdSense, please tell me about it in a comment using the form below the post or drop me an email about it!

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